When a solid state drive or disk (SSD) boots up from a power-off state, a hibernation state, or other low-power states, a runtime environment needs to be loaded by an SSD controller for the SSD to enter normal operations. Typically, a small start-up program is stored in a read-only memory (ROM), which is shipped with the drive. Since ROM is read-only, the start-up program can only load pre-defined system data (referred to herein as a root record) from fixed (pre-defined) locations in a non-volatile media (NVM), such as flash memory, of the SSD. The data in the fixed location may refer to other system data such as a map, an operating system, etc. Flash memory suffers from various sources of noise such as program/erase wear, retention, read disturb, etc. Error correction codes (ECC) are used to protect data stored in flash. The SSD controller needs to be able to correctly read the root record almost all the time. If any read fails, the drive is said to have “bricked” (i.e., become inaccessible). Solid state drives or disks (SSDs) use conventional BCH (Bose Chaudhuri Hocquenghem) codes as the primary ECC. As newer generations of multi-level cell (MLC) flash memory (e.g., sub-20 nm) as well as tri-level cell (TLC) flash memory emerge as more cost-efficient choices for SSDs, low density parity check (LDPC) codes are becoming the ECC of choice. However, several new problems arise with the use of LDPC codes and smaller geometries. For a controller to support multiple types of flash memories from multiple vendors, including all flash-specific (non-standard) commands/information into the ROM is difficult. Also, the ROM cannot support new flash commands/information that may be introduced after the ROM is constructed. Examples of such non-standard commands/information include soft read related commands and flash page layout in a block (e.g., which pages are lower page and which pages are upper pages in an MLC device). Soft read related commands are needed to support soft-decision LDPC (SLDPC) decoding. Due to this limitation, supporting SLDPC in reading the root record is difficult. In addition, read disturb noise is more severe on flash memory of smaller geometry. LDPC codes have an error floor. Depending on the code and the decoding algorithm, the error floor can vary. Typically, hard-decision LDPC (HLDPC) decoding leads to a higher error floor than soft-decision LDPC (SLDPC) decoding. The error floor can be as high as a 1e−6 codeword failure rate if the code is weaker, less optimized or a weaker HLDPC decoder is used. In addition, read disturb noise is more severe on flash memory of smaller geometry. Another noise/failure mechanism is block failure. A block may fail as usage of the block increases or due to other factors such as environmental radiation. When a block that contains the root record fails, no ECC can help.
It would be desirable to have a method and/or apparatus for implementing a read policy for system data of solid state drives or disks (SSDs).